发明名称 CLOCK SIGNAL-REGENERATING/RECEIVING DEVICE, AND CLOCK SIGNAL REPRODUCING/RECEIVING METHOD
摘要 <p>PROBLEM TO BE SOLVED: To provide a clock signal regeneration circuit of an OFDM receiving device for accurately generating a clock signal, having no frequency and phase errors. SOLUTION: The frequency component data of sub carriers, where an OFDM signal is subjected to discrete Fourier transformation are selected by selectors 30 and 40 and are stored in RAMs 6 and 7. The frequency component of the sub carrier signal at least one sub carrier before in the same symbol that is stored by the RAMs 6 and 7, and the frequency component of the newly obtained sub-carrier signal are subjected to complex multiplication by a complex multiplication circuit 11, before being supplied to a ROM 12. The ROM 12 reads the amount of variation between sub carriers, corresponding to the complex multiplication result, and supplies it to an accumulation addition circuit 15. The accumulation addition circuit 15 performs the accumulation addition of the amount of phase extending over one symbol time and supplies the result to an offset addition circuit 16. The offset addition circuit 16 adds a fixed offset value to the accumulation addition result before outputting. The oscillation frequency of a clock signal is controlled by a clock oscillation control circuit 60, according to the output of offset addition.</p>
申请公布号 JP2002094480(A) 申请公布日期 2002.03.29
申请号 JP20000278212 申请日期 2000.09.13
申请人 MITSUBISHI ELECTRIC CORP 发明人 MAENO AKIKO;FUJIWARA TAKU;IDO JUN
分类号 H04J11/00;H04L7/00;H04L27/26;(IPC1-7):H04J11/00 主分类号 H04J11/00
代理机构 代理人
主权项
地址