SEMICONDUCTOR MEMORY INTEGRATED CIRCUIT

摘要

PROBLEM TO BE SOLVED: To provide a semiconductor memory integrated circuit which can perform an efficient test using a memory tester. SOLUTION: In a semiconductor memory integrated circuit provided with a shift register 4 which converts parallel data which is controlled by a clock and read out to a main data line from a memory cell array into serial data, and converts write-in data supplied from a data input/output buffer in serial into parallel data, a combination of numbers (n) of data input/output terminals DQn allotted to the main data line MDQ is rearranged on the data input/output terminals DQn by intersecting one part of the main data lines MDQ between the memory cell array and a shift register.