| 摘要 |
PROBLEM TO BE SOLVED: To realize a shift register circuit which sequentially outputs in the data holding order during a shift period even when a holding period exists and the number of clocks during the holding period does not coincides with the number of steps of the shift-operating registers, and which has a small pattern occupancy area when they are made into an integrated circuit. SOLUTION: The number of registers constituting plural pieces of register groups R1, R2 is made to be a divisor of the number of clocks, and also the number of the register groups is minimized. Therefore, when the shift period starts, the data are put back to the same storage order state as that when the holding period starts, by circulating the data in the holding period, so the data can be outputted in order of being inputted. Further, the number of selector circuits is minimized by combining them to minimize the number of register groups, and an occupancy area is reduced when they are made into an integrated circuit. |
