NON-VOLATILE PASSIVE MATRIX AND METHOD FOR READOUT OF THE SAME

摘要

In a non-volatile passive matrix memory device (10) comprising an electrically polarizable dielectric memory material (12) exhibiting hysteresis between first and second sets (14; 15) of addressing electrodes, the electrodes of the first set (14) are word lines (WL) and the electrodes of the second set (15) are bit lines (BL) of the memory device. A memory cell (13) with a capacitor-like structure is defined in the memory material (12) at the overlap between a word line (WL) and a bit line (BL). The word lines (WL) are divided into segments (S) with each segment sharing and being defined by adjoining bit lines (BL) and means (25) are provided for connecting each bit line (BL) of a segment (S) with a sensing means (26), thus enabling simultaneous connections of all memory cells (13) of a word line segment (15) for readout via the bit lines (BL) of the segment (S). Each sensing means (26) senses the charge flow in a bit line (BK) in order to determine a logical value stored in a memory cell (13) defined by the bit line (BL). In a readout method for a memory device of this kind a word line (WL) of a segment (S) is activated according to a protocol by setting its potential to a switching voltage Vs of the memory cell (13) during at least a portion of a read cycle, while keeping the bit lines (BL) of a segment (S) at zero potential, during which read cycle a logical value stored in the individual memory cells (13) is sensed by the sensing means (26). Use in a volumetric data storage apparatus with a plurality of stacked layers which each comprises a non-volatile passive matrix memory device.