| 摘要 |
A programmable high speed frequency divider, in which the construction of flip-flops for forming a frequency divider which is capable of programming the dividing ratio of an input clock frequency is simplified in order to increase the operation speed of the frequency divider, is provided. By simplifying the structures of least significant bit flip-flops, including the flip-flop representing the least significant bit, among flip-flops forming a frequency divider, the operation speed of the counter in the frequency divider is increased and the frequency limit of an input clock which can be divided is raised.
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