发明名称 Technique for correcting single-bit errors in caches with sub-block parity bits
摘要 A data block includes a plurality of sub-blocks. Each sub-block includes a sub-block check bit that may be used to detect the presence of a bit error within the sub-block. A composite sub-block is generated, which is the column-wise exclusive-or of the bits of each sub-block. In one embodiment, the composite sub-block is not stored, but rather used for computational purposes only. A plurality of composite check bits is used to detect a bit position of a bit error within the composite sub-block. If a bit error within the data block occurs, the sub-block check bits may be used to detect in which sub-block the error occurred. The composite check bits may be used to determine which bit position of the composite sub-block is erroneous. The erroneous bit position of the composite sub-block also identifies the bit position of the erroneous bit in the sub-block identified by the sub-block check bits. Accordingly, the sub-block and the bit position within the sub-block may be detected by using the sub-block check bits and the composite check bits.
申请公布号 US2002038442(A1) 申请公布日期 2002.03.28
申请号 US20010975225 申请日期 2001.10.11
申请人 CYPHER ROBERT 发明人 CYPHER ROBERT
分类号 G06F11/10;G06F12/10;G06F12/16;(IPC1-7):H03M13/00 主分类号 G06F11/10
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