发明名称 |
Dual amorphization process optimized to reduce gate line over-melt |
摘要 |
A method of fabricating an integrated circuit with ultra-shallow source/drain junctions utilizes a dual amorphization technique. The technique creates a shallow amorphous region and a deep amorphous region 300 nm thick. The shallow amorphous region can be between 10-15 nm below the top surface of the substrate, and the deep amorphous region can be between 150-200 nm below the top surface of the substrate. The process can reduce gate over-melting effects. The process can be utilized for P-channel or N-channel metal oxide semiconductor field effect transistors (MOSFETs).
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申请公布号 |
US6361874(B1) |
申请公布日期 |
2002.03.26 |
申请号 |
US20000597623 |
申请日期 |
2000.06.20 |
申请人 |
ADVANCED MICRO DEVICES, INC. |
发明人 |
YU BIN |
分类号 |
H01L21/265;H01L21/268;H01L21/336;(IPC1-7):H01L21/336 |
主分类号 |
H01L21/265 |
代理机构 |
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代理人 |
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主权项 |
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地址 |
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