发明名称 Asymmetric RAM cell
摘要 A single-ended read, differential write CMOS SRAM cell has two inverters connected in a regenerative feedback circuit. Each inverter includes two complementary FETs. FETs of the same type in each inverter have differing gate widths and/or drive currents. The cell includes pass gate FETs having gate regions of approximately the same widths but differing lengths.
申请公布号 US6363006(B2) 申请公布日期 2002.03.26
申请号 US20010812659 申请日期 2001.03.19
申请人 HEWLETT-PACKARD COMPANY 发明人 NAFFZIGER SAMUEL D.;WEISS DONALD R.
分类号 G11C11/41;G11C11/412;H01L21/8238;H01L21/8244;H01L27/092;H01L27/11;(IPC1-7):G11C11/00 主分类号 G11C11/41
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