发明名称 Content addressable memory cell and design methodology utilizing grounding circuitry
摘要 A CAM cell design methodology and a method of pre-charge and comparison timing is disclosed. A CAM cell utilizing this design methodology includes grounding circuitry and a P-channel transistor configured to communicate a comparison result to a match line using the Miller effect. In one embodiment, the CAM cell further includes a positive comparison bit line, a negative comparison bit line, a first dual-ended CAM memory core cell configured to store data, a second dual-ended CAM memory core cell configured to store masking data, comparison circuitry, and a second P-channel transistor configured to communicate a masked state to the match line.
申请公布号 AU8694201(A) 申请公布日期 2002.03.22
申请号 AU20010086942 申请日期 2001.08.29
申请人 TALITY, L.P. 发明人 LUVERNE R. PETERSON
分类号 G11C15/00 主分类号 G11C15/00
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