| 摘要 |
<p>PROBLEM TO BE SOLVED: To enable performance of a signal processing by DMA transfer using an external bus without preventing a memory access operation using an internal bus of a processor. SOLUTION: This microprocessor is provided with connection switching units SA1, SD1 to cut off the external bus 600 consisting of an address bus 400, a data bus 500 from the internal bus consisting of an internal address bus 106, an internal data bus 107, an arithmetic unit 101, an internal memory 300 connected with the external bus 600 via the connection switching units SA1, SD1 and connected with the arithmetic unit 101 via the internal buses 106, 107 and an instruction decoder 105 to analyze an instruction code to be given to the arithmetic unit 101, to judge propriety of use of the external bus 600 and to output a bus free information signal to indicate a judgment result and performs control to cut off the internal buses 106, 107 from the external bus 600 by the connection switching units SA1, SD1 when the instruction decoder 105 judges that the external bus 600 is not used.</p> |
