| 摘要 |
A semiconductor integrated circuit comprising an input protection device which is suitable for receiving inputs of signals having voltages higher than the internal power supply voltage is provided. The input protection device consists of an offset NMOS transistor in which one of heavily doped N-type diffusion layers 2a is electrically connected to a signal input terminal of the semiconductor integrated circuit. In the NMOS transistor, the field isolation structure is a trench structure, and the heavily doped N-type diffusion layers 2a are offset from the gate electrode. Since a parasitic bipolar action easily occurs according to this construction, the protective function against overcurrent caused by static electricity or the like is not impaired. Since signal voltages are by no means applied directly to the gate oxide of the protection device during normal operation, signals with voltages higher than the internal power supply voltage can be input.
|
