发明名称 STREAM DECODER
摘要 An identifier for specifying the channel of a PES packet outputted from a TS decoder is attached to the header of the PES packet by an identifier attaching circuit. PID information corresponding to the identifier is read out of an identifier table by an identifier selecting circuit. The PES packets are stored for each channel in storage areas (CH1 to CHn) of a bank memory designated by a control section with respect to the PID information. The stored packets are decoded for each channel by a decoding circuit.
申请公布号 WO0223776(A1) 申请公布日期 2002.03.21
申请号 WO2001JP07660 申请日期 2001.09.04
申请人 MATSUSHITA ELECTRIC INDUSTRIAL CO., LTD.;OKAMOTO, SATOSHI;TSUJI, TOSHIAKI;MORISHITA, HIROYUKI;HIRAI, MAKOTO;KIYOHARA, TOKUZOU 发明人 OKAMOTO, SATOSHI;TSUJI, TOSHIAKI;MORISHITA, HIROYUKI;HIRAI, MAKOTO;KIYOHARA, TOKUZOU
分类号 H04N21/44;H04N5/00;H04N5/44;H04N5/50;H04N21/4385;(IPC1-7):H04J3/00;H04N7/24 主分类号 H04N21/44
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