发明名称 COMBINED TRACKING OF WLL AND VPP WITH LOW THRESHOLD VOLTAGE IN DRAM ARRAY
摘要 <p>In generating first and second voltages (VPP and WLL) for respectively activating and deactivating transistors of a DRAM array that transfer charge to cells of the DRAM array, the second voltage can be lowered to compensate for a threshold voltage (Vt) that is lower than a nominal threshold voltage value (VtNOM). Furthermore, the first voltage is tracked together with the second voltage in order to maintain a generally constant voltage swing (VSW) therebetween, thereby advantageously avoiding damage to the gate oxides in the wordline driver circuits (11, 12).</p>
申请公布号 WO2002023548(A2) 申请公布日期 2002.03.21
申请号 US2001028439 申请日期 2001.09.13
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