发明名称 |
Inline and Y input-output bus topology |
摘要 |
Various bus trace topologies are provided which allow for shorter stub lengths, reduced motherboard costs, more efficient routing between multiple agents, and bus traces with better matched characteristic impedances.
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申请公布号 |
US2002033276(A1) |
申请公布日期 |
2002.03.21 |
申请号 |
US20010935421 |
申请日期 |
2001.08.22 |
申请人 |
DABRAL SANJAY;ZENG MING;SAMPATH DILLIP;SCHOENBORN ZALE T. |
发明人 |
DABRAL SANJAY;ZENG MING;SAMPATH DILLIP;SCHOENBORN ZALE T. |
分类号 |
H05K1/00;H05K1/02;(IPC1-7):H05K1/11 |
主分类号 |
H05K1/00 |
代理机构 |
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代理人 |
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主权项 |
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地址 |
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