发明名称 Vermittlungseinheit zwischen Eingängen und Ausgängen eines Kommunikationssystems
摘要 <p>A switch includes a plurality of memories (3011-301N) respectively having write terminals connected to input ports and output terminals, each of the memories including an input acknowledgement signal generating block for generating an input acknowledgement signal (IP) when data is received thereto. A multiplexer (25), which is coupled between the read terminals of the memories and an output port, connects one of the memories to the output port in response to a port number signal. An output controller (801), which is coupled to the memories and the multiplexer, receives the input acknowledgement signal from each of the memories in order of receipt and generating the port number signal so that data stored in the memories is selected by the multiplexer in order of receipt of the input acknowledgement signal. <IMAGE></p>
申请公布号 DE69232010(T2) 申请公布日期 2002.03.21
申请号 DE1992632010T 申请日期 1992.03.10
申请人 FUJITSU LTD., KAWASAKI;NIPPON TELEGRAPH AND TELEPHONE CORP., TOKIO/TOKYO 发明人 SHINOMIYA, TOMOHIRO;SHIMOE, TOSHIO;TAKEO, HIROSHI
分类号 H04Q3/52;H04J3/16;H04J3/24;H04L12/931;H04L12/951;(IPC1-7):H04L12/56 主分类号 H04Q3/52
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