Half bridge configuration

摘要

A half-bridge circuit arrangement has two transistors (T1,T2) in which both transistors are connected in series by their drain electrodes, a driving voltage (UB) is applied to the series circuit, and a load (L) can be connected to the interconnected drain electrodes of both the transistors. The two transistors (T1,T2) are of opposite conductivity type and each transistor is produced on a discrete chip (CH1,CH2), with both chips placed with their rear faces on a common electrically conducting carrier, so that a drain electrode of the first transistor (T1) is connected to an equivalent drain electrode of the second transistor (T2). The conducting carrier forms a summation point and the load (L) is connectable to the conducting carrier or to the summation point.