| 摘要 |
A computer system permits the use of a software-based power management system, such as ACPI, while maintaining compatibility with legacy peripherals. The computer system utilizes a sleep register and a decoy register that receive sleep requests from the operating system. The sleep type bits transmitted to the sleep register are configured to allow the computer system to remain in fully operational mode, and only the decoy register receives the correct sleep type bits from a sleep request. When a sleep enable bit in the decoy register is set by a sleep request, an SMI is generated to run an interrupt service routine to perform any desired configuration routines prior to sleep mode. The interrupt service routine then writes the true sleep type bits to the sleep register, placing the computer system into sleep mode. The sleep enable bit resides in the highest byte of the decoy register so that byte-wide write operations do not trigger the SMI before the entire 16-bit sleep request is received.
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