| 发明名称 |
Vertical PNP bipolar transistor and its method of fabrication |
| 摘要 |
A bipolar vertical PNP transistor compatible with CMOS processing and useful in a complementary BiMOS structure is characterized in that it is devoid of an epitaxial layer and employs a high-energy implanted phosphorus layer to provide N-type substrate isolation.
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| 申请公布号 |
US6359317(B1) |
申请公布日期 |
2002.03.19 |
| 申请号 |
US19980222587 |
申请日期 |
1998.12.28 |
| 申请人 |
AGERE SYSTEMS GUARDIAN CORP. |
发明人 |
CARROLL MICHAEL S.;CHYAN YIH-FENG;CHAUDHRY SAMIR;IVANOV TONY G.;DAIL ROBERT W.;CHEN ALAN S. |
| 分类号 |
H01L21/331;H01L21/8249;H01L27/06;H01L29/732;(IPC1-7):H01L29/76;H01L29/94 |
主分类号 |
H01L21/331 |
| 代理机构 |
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