发明名称 |
Processor for making more efficient use of idling components and program conversion apparatus for the same |
摘要 |
A processor that has a plurality of instruction slots each of which stores an instruction to be executed in parallel. One of the plurality of instruction slots is a first instruction slot and another a second instruction slot. A special instruction stored in the first instruction slot is executed by a first functional unit that executes instructions stored in the first instruction slot, and a second functional unit that executes instructions stored in the second instruction slot. An instruction stored in the second instruction slot is executed in parallel by a third functional unit that executes instructions stored in the second instruction slot.
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申请公布号 |
US6360312(B1) |
申请公布日期 |
2002.03.19 |
申请号 |
US19990280363 |
申请日期 |
1999.03.29 |
申请人 |
MATSUSHITA ELECTRIC INDUSTRIAL CO., LTD. |
发明人 |
KAWAGUCHI KENICHI |
分类号 |
G06F9/30;G06F9/302;G06F9/318;G06F9/38;(IPC1-7):G06F15/00 |
主分类号 |
G06F9/30 |
代理机构 |
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代理人 |
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主权项 |
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地址 |
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