| 摘要 |
<p>PROBLEM TO BE SOLVED: To write or read a plurality of memory transistors continuing to a word line in parallel in a VG memory cell array. SOLUTION: When a memory cell array 1 comprising a plurality of memory cells providing the active area (channel formation area) of the memory cell comprising a first conduction type semiconductor and a common impurity areas in the word direction between the adjacent memory cells comprising a second conduction type semiconductor is operated, a capacity is connected on the boundary part of the active area and the impurity area, a control gate insulated electrically from the word line is driven, and one physical memory cell array is electrically divided into n memory cell arrays MA1, MA2,...Man. The impurity area and the word line are driven, and in the same memory cell array, for instance, a plurality of memory cells on the word line of cell arrays 1,...n+1,..., 2n+1,... are operated in parallel.</p> |
