发明名称 BUILD-UP PRINTED WIRING BOARD
摘要 PROBLEM TO BE SOLVED: To provide a build-up multilayer printed wiring board which is excellent in thermal resistance, adhesion, durability, and dimensional accuracy, can be reduced in weight and thickness, and has a wiring that can be improved in density and reduced in thickness and to provide its manufacturing method. SOLUTION: Circuit conductor layers and an interlayer insulating layer are provided at least on the one side of an inner circuit board, and the conductor layers are electrically connected together to form a build-up multilayer printed wiring board. The interlayer insulating layer is formed of a heat-resistant film which has a linear expansion coefficient of -5 to 10 ppm/ deg.C and is 20μm or below in thickness and a thermosetting resin layer, and the circuit conductor layer is formed by plating.
申请公布号 JP2002076641(A) 申请公布日期 2002.03.15
申请号 JP20000259838 申请日期 2000.08.29
申请人 ASAHI KASEI CORP 发明人 KASATANI HIDEO;YAMADA TAKASHI
分类号 H05K3/46;(IPC1-7):H05K3/46 主分类号 H05K3/46
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