发明名称 MANUFACTURING METHOD OF MULTILAYER INTERCONNECTION BOARD AND PLATING METHOD
摘要 PROBLEM TO BE SOLVED: To provide a method for manufacturing a multilayer interconnection board that is fine and has high density by a highly productive process. SOLUTION: The manufacturing process of the multilayer interconnection board comprises a process for forming an insulating resin layer 20 having a via hole 21 reaching a first wiring layer 11 on the surface of a base 10, a conductive film formation process for forming a copper thin film 30 on the surface of the insulating resin layer 20, a resist film formation process for forming, on the surface of the copper thin film 30, a resist film 40 having an opening 41 that is formed so that the resist film 40 partially covers the upper surface of the via hole 21, and a wiring formation section 42 that is formed at a site corresponding to second wiring 52 while communicating with the opening 41, a process for filling a conductive metal into the opening 41 and the wiring formation section 42 on the via hole 21 by electric plating, and a process for removing the resist film 40 and the copper thin film 30.
申请公布号 JP2002076633(A) 申请公布日期 2002.03.15
申请号 JP20000255841 申请日期 2000.08.25
申请人 TOSHIBA CORP 发明人 HIGUCHI KAZUTO
分类号 H05K1/09;C25D7/00;H05K3/18;H05K3/42;H05K3/46;(IPC1-7):H05K3/46 主分类号 H05K1/09
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