发明名称 |
Semiconductor memory apparatus, semiconductor apparatus, data processing apparatus and computer system |
摘要 |
A semiconductor memory apparatus is provided with a memory array, a first global bit line connected to a sense amplifier, a second global bit line connected to a write amplifier, and a selection circuit for connecting a plurality of bit lines selectively to the first global bit line and the second global bit line.
|
申请公布号 |
US2002031007(A1) |
申请公布日期 |
2002.03.14 |
申请号 |
US20010988197 |
申请日期 |
2001.11.19 |
申请人 |
OSADA KENICHI;HIGUCHI HISAYUKI;ISHIBASHI KOICHIRO |
发明人 |
OSADA KENICHI;HIGUCHI HISAYUKI;ISHIBASHI KOICHIRO |
分类号 |
G11C11/413;G06F12/08;G11C7/06;G11C7/18;G11C11/401;G11C11/41;H01L21/8244;H01L27/11;(IPC1-7):G11C11/00 |
主分类号 |
G11C11/413 |
代理机构 |
|
代理人 |
|
主权项 |
|
地址 |
|