发明名称 |
Test circuit of semiconductor integrated circuit |
摘要 |
A test code is input to a test mode control circuit so that the test mode control circuit creates the test decode signal. The test decode signal is converted into serial data with a parallel.serial converting circuit in synchronization with a base clock. The serial data is input to a serial.parallel converting circuit located in the vicinity of the test code latch circuit dispersed on the semiconductor chip via one very long serial data line extending from end to end of the semiconductor chip.
|
申请公布号 |
US2002032887(A1) |
申请公布日期 |
2002.03.14 |
申请号 |
US20010948406 |
申请日期 |
2001.09.06 |
申请人 |
KABUSHIKI KAISHA TOSHIBA |
发明人 |
KIMURA TOHRU;HISADA TOSHIKI |
分类号 |
G01R31/28;G06F12/16;G11C29/12;G11C29/46;G11C29/48;(IPC1-7):G11C29/00 |
主分类号 |
G01R31/28 |
代理机构 |
|
代理人 |
|
主权项 |
|
地址 |
|