发明名称 Defect and etch rate control in trench etch for dual damascene patterning of low-k dielectrics
摘要 A dual damascene process for low-k or ultra low-k dielectric such as organo-silicate glass (OSG). After the via (112) etch, a trench (121) is etched in the OSG layer (108) using a less-polymerizing fluorocarbon added to an etch chemistry comprising a fluorocarbon and low N2/Ar ratio. The low N2/Ar ratio controls ridge formation during the trench etch. The combination of a less-polymerizing fluorocarbon with a higher-polymerizing fluorocarbon achieves a high etch rate and defect-free conditions.
申请公布号 US2002031906(A1) 申请公布日期 2002.03.14
申请号 US20010947966 申请日期 2001.09.06
申请人 JIANG PING;CELII FRANCIS G.;NEWTON KENNETH J.;SAKIMA HIROMI 发明人 JIANG PING;CELII FRANCIS G.;NEWTON KENNETH J.;SAKIMA HIROMI
分类号 H01L21/311;H01L21/768;(IPC1-7):H01L21/476 主分类号 H01L21/311
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