发明名称 |
Semiconductor memory device with redundancy circuit |
摘要 |
This invention provides a semiconductor memory device with a shift redundancy circuit which has a shortened redundancy operation. The semiconductor memory device of the present invention includes a plurality of shift switches and a changeover signal generating circuit connected to the shift switches. The changeover signal generating circuit may have a plurality of signal generating blocks including a first signal generating block for generating a first group of changeover signals and a second signal generating block for generating a second group of changeover signals.
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申请公布号 |
US2002031023(A1) |
申请公布日期 |
2002.03.14 |
申请号 |
US20010968609 |
申请日期 |
2001.10.02 |
申请人 |
FUJITSU LIMITED |
发明人 |
SUGAMOTO HIROYUKI;OGAWA YASUSHIGE |
分类号 |
G11C29/00;(IPC1-7):G11C29/00 |
主分类号 |
G11C29/00 |
代理机构 |
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代理人 |
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主权项 |
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地址 |
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