发明名称 Semiconductor memory device
摘要 <p>A dummy cell circuit, used in semiconductor memory capable of high-speed operation without inviting enlargement of the chip size even when using a paraelectric capacitor, includes at least one paraelectric capacitor and have a specific relation between potentials applied to its terminals. For example, in a standby mode, a first terminal of the paraelectric capacitor is precharged to a first potential higher than ground potential whereas a second terminal of the paraelectric capacitor is pre-charged to ground potential. In an active mode, the first terminal is connected to one of paired bit lines, which is a reference bit line to which data is not read-out from memory cell, and the second terminal is raised from ground potential to a second potential higher than ground potential. &lt;IMAGE&gt;</p>
申请公布号 EP1187141(A2) 申请公布日期 2002.03.13
申请号 EP20010120724 申请日期 2001.09.05
申请人 KABUSHIKI KAISHA TOSHIBA 发明人 TAKASHIMA, DAISABURO
分类号 G11C14/00;G11C11/22;(IPC1-7):G11C11/22 主分类号 G11C14/00
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