发明名称 METHOD AND DEVICE FOR CORRECTING TEST PATTERN
摘要 PROBLEM TO BE SOLVED: To reduce a load for a test pattern preparing work for new circuit, when a circuit is changed. SOLUTION: By using a port terminal name and a pin attribute, a circuit change portion is specified, and the contents of correction are classified for each path in a path classification process S4, and the contents of correction of the circuit are materialized and classified in a correction content classification process S5. In the content of correction capable of automatically correcting a test pattern, a test pattern file for a new circuit is prepared automatically, based on a test pattern for old circuit. When correction automatic correction is disabled, only format correction of pin definition is performed, a test pattern format is prepared, and a port terminal name requiring the examination of a test pattern value is fed back to the operator. The operator examines the test pattern based on the information, prepares the pattern value, and completes the test pattern file for new circuit.
申请公布号 JP2002073724(A) 申请公布日期 2002.03.12
申请号 JP20000262799 申请日期 2000.08.31
申请人 MATSUSHITA ELECTRIC IND CO LTD 发明人 OHASHI TAKAKO
分类号 G01R31/28;G01R31/3183;G06F17/50;(IPC1-7):G06F17/50;G01R31/318 主分类号 G01R31/28
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