发明名称 TIMING CORRECTION CIRCUIT, TIMING CORRECTION METHOD AND SEMICONDUCTOR INSPECTION DEVICE
摘要 PROBLEM TO BE SOLVED: To correct the shift between a set-up time at the rising of an output signal waveform and a set-up time in falling. SOLUTION: By performing level adjustment by lowering the level of a comparing signal Sp shown by a fine line I byΔV as shown by a thick line III, the rising timing of the comparing signal Sp is delayed byΔt and the falling timing thereof is accelerated byΔt to equalize the rising required time t3 (=t1+Δt) at the time of rising of an output signal OUT 1 and the falling required time t4 (=t2-Δt) at the time of falling thereof.
申请公布号 JP2002071760(A) 申请公布日期 2002.03.12
申请号 JP20000264028 申请日期 2000.08.31
申请人 ADVANTEST CORP 发明人 SATO HIROHIDE;NIIJIMA HIROKATSU
分类号 G01R31/28;H03K5/12;(IPC1-7):G01R31/28 主分类号 G01R31/28
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