| 摘要 |
Dummy cell test circuit for measuring delay times in embedded, said embedded circuits being connected to access circuits equipped with input access pads and output access pads, between which is comprised an electrical main path, said test circuit comprising a test input pad and a test output pad, between which is comprised an electrical dummy test path. According to the present invention the test input pad correspond to the access input pad (IN1' IN1'') of the embedded circuit (2).
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