发明名称 SIGNAL DETENTION CIRCUIT AND PICTURE DISPLAY DEVICE USING THE SAME
摘要 PROBLEM TO BE SOLVED: To prevent the latch up in a reception drive circuit control IC at the time of applying a DC power voltage. SOLUTION: This signal detection circuit comprises a signal input part 9 for detecting an input signal and/or a noise voltage level, a voltage detector 8 for detecting an output voltage level from the signal input part even when the power voltage is not applied, and a transistor array of a PNP transistor Tr1, an NPN transistor Tr2, and an NPN transistor Tr3 for controlling ON/ OFF of the power voltage based on the 'Enable' signal presenting that an output signal from a terminal OUT of the voltage detector 8 and a DC-DC converter circuit 4 is in operation.
申请公布号 JP2002072952(A) 申请公布日期 2002.03.12
申请号 JP20000256514 申请日期 2000.08.25
申请人 SHARP CORP 发明人 MAYUMI MINORU
分类号 G02F1/133;G09G3/20;G09G3/36;H04N5/63;H04N5/66;(IPC1-7):G09G3/20 主分类号 G02F1/133
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