| 摘要 |
A digital channelizer employs a polyphase filter element in which a shift register is used to commutate time series data to a bank of polyphase filters at the inputs of an FFT module. The filter bank and FFT module are updated at a frequency that is independent of the rate that the data is fed into the buffer and filter/FFT cycle rates of less than the ratio of the input data rate to the number of input channels may be accommodated by the shift register commutation. The output of the FFT module is interpolation filtered by inserting interpolated points between adjacent data points in the channelized output stream to increase the output frequency by an integral multiple of the update rate of the polyphase filter/FFT update rate. By determining an integer, q, such that (Ro/Ri)(2N-q) is a non-zero integer l, where Ro is a desired output data rate, Ri is an input data rate and 2N is the number of output channels (M<N), updating the filter/FFT at a rate of Ri/(2N-q), and interpolation filtering by inserting l-1 interpolated data between each successive pair of channelized data, a desired output data rate can be matched with an input data rate.
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