| 摘要 |
PURPOSE: A charge pump circuit of non-volatile memory device is provided to be capable of maintaining an initial node value with a power supply voltage level by suppressing an output delay of a high voltage. CONSTITUTION: An inverter(36) inverts an enable signal(EN), and a VDD switching transistor(37) is turned on by an inverted enable signal, and supplies VDD to each charge pump node. The first to fourth node initial value setting blocks(38, 39, 40, 41) set initial values of nodes in response to the inverted enable signal. The first charge pump block(31) pumps a voltage of the node(node 0), supplied from the transistor(37), in response to the first and third charge pump control signals(EPMP1, EPMP3), and outputs the pumped voltage to a node(node 1). The second charge pump block(32) pumps a voltage of the node(node 1) in response to the second and fourth charge pump control signals(EPMP2, EPMP4), and outputs the pumped voltage to a node(node 2). The third charge pump block(33) pumps a voltage of the node(node 2) in response to the first and third charge pump control signals(EPMP1, EPMP3), and outputs the pumped voltage to a node(node 3). The fourth charge pump block(34) pumps a voltage of the node(node 3) in response to the second and fourth charge pump control signals(EPMP2, EPMP4), and outputs the pumped voltage to a node(node 4). A VPP output block(35) boosts an output voltage of the node(node 4) to output a VPP voltage.
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