发明名称 DAMASCENE DOUBLE GATED TRANSISTORS AND RELATED MANUFACTURING METHODS
摘要 <p>This invention provides the structure and fabrication process of a completely planar, Damascene double gated transistor (100). The structure has a novel self-aligned, hyper-abrupt retrograde body (130) and a zero-parasitic, endwall gate-body connection. The structure (100) provides for increased density and enables ultra low power to be utilized. The methods also provide for simultaneously making both four-terminal and dynamic threshold MOSFET devices.</p>
申请公布号 WO2002019396(A1) 申请公布日期 2002.03.07
申请号 US2001026920 申请日期 2001.08.29
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