| 摘要 |
PURPOSE: A timing clock generator is provided to receive selectively two or more synchronous reference clocks and generate a plurality of reference clocks. CONSTITUTION: The first demultiplier(211) receives a synchronous clock(E1/DS1) from an upper station and a clock of E1/DS1/8KHZ. The second demultiplier(212) receives a GPS(Global Positioning System) signal from a GPS receiver and outputs a clock of 8KHz. A frequency stabilization and switching portion(220) receives the clocks from the first demultiplier(211) and the second demultiplier(212), outputs a stabilized E1/DS1, a clock of 16MHz, a clock of 8MHz, a clock of 4MHz, and a clock of 3MHz, and monitors a state of clock in order to perform an automatic switching function. A frame generation portion(230) receives E1/DS1 from the frequency stabilization and switching portion(220) and generates a frame reference clock signal. A clock amplification/distribution portion(240) amplifies and distributes the frame reference clock signal and outputs a framed/unframed E1/DS1 clock to a multitude of output terminals.
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