发明名称 |
Semiconductor integrated circuit device and method of manufacturing the same |
摘要 |
Collector regions (32, 33) with films capable of withstanding high voltage by laminating 4 epitaxial layers when the collector regions (32, 33) are formed. In order to reduce effects caused by interference between the transistors (21, 22) and also reduce parasitic transistor, the epitaxial layers and substrate are etched in a V-groove. Each etched region is dielectrically isolated by the poly-Si (42).
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申请公布号 |
US2002028561(A1) |
申请公布日期 |
2002.03.07 |
申请号 |
US20010946216 |
申请日期 |
2001.09.05 |
申请人 |
TAKADA TADAYOSHI;KITAMURA OSAMU;OKAWA SHIGEAKI;HATA HIROTSUGU;FUJINUMA CHIKAO |
发明人 |
TAKADA TADAYOSHI;KITAMURA OSAMU;OKAWA SHIGEAKI;HATA HIROTSUGU;FUJINUMA CHIKAO |
分类号 |
H01L21/762;H01L21/8228;H01L21/84;H01L27/12;(IPC1-7):H01L21/331 |
主分类号 |
H01L21/762 |
代理机构 |
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地址 |
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