| 摘要 |
PURPOSE: A current reducing circuit of semiconductor memory device is provided to be capable of reducing a current consumption amount by lowering a voltage switching level. CONSTITUTION: The first inverter(21) inverts an input signal(in), and the second inverter(22) inverts an output signal of the first inverter(21). The first to third PMOS transistors(23, 24, 25) are connected in series between a power supply voltage and an output terminal of a reference voltage generating part(13). Gates of the first to third PMOS transistors(23, 24, 25) are supplied with an output signal of the second inverter(22), an output signal of the first inverter(21), and the output signal of the second inverter(22), respectively. An output terminal(out) is placed between the first and second PMOS transistors(23, 24), and a reference output terminal(ref) is placed at the second and third PMOS transistors(24, 25). A reference signal(ref) is generated using a reference voltage(vr) so as to have a constant swing amplitude at a data output buffer(11).
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