| 摘要 |
PURPOSE: An ATM cell bus switching device is provided to transmit received ATM cells through several ports at the same time, and maintain regular speed of processing ATM cells regardless of increase in STM1 interface. CONSTITUTION: A plurality of STM1(Synchronous Transfer Mode1) interfaces(21A-21N)(31A-31N) are connected to the corresponding FIFO control logic in a plurality of FIFO control logic(23A-23N)(33A-33N) for interfacing ATM cells. A plurality of lookup tables(22A-22N)(32A-32N) are connected to the corresponding FIFO control logic in the plurality of FIFO control logic(23A-23N)(33A-33N) for storing switching information related to the ATM cells. The plurality of FIFO control logic(23A-23N)(33A-33N) read port information to be switched at the lookup tables(22A-22N)(32A-32N) based on the value of a virtual path/a virtual channel recorded at a header of the ATM cell, and assigns the ATM cells to arbitrary ports to be switched at the same time.
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