Information processing apparatus

摘要

An information processing apparatus having a CPU, a memory and a memory controller. The CPU includes a burst access interface for rapidly transferring data, and a single access interface for partial write operations. The memory controller comprises two ECC controllers, one for burst access and the other for single access. Either burst access mode or single access mode can be selected, so that both ECC-based high reliability and a high-speed memory access capability are made available.