| 摘要 |
PURPOSE: A monostable multi-vibrator is provided to generate an output data signal with a constant pulse width though a supply voltage is varied. CONSTITUTION: A D-flipflop(202) has a data input terminal for receiving a high level signal and a clock input terminal for receiving a trigger pulse signal. The D-flipflop(202) generates an output signal of logic 1 whenever the trigger pulse signal is received. The D-flipflop(202) is reset by an active low signal. A constant current source circuit(204) is used for supplying constant current. A switch circuit(206) is used for charging a capacitor(208) when an output data signal is the logic 1 or discharging the capacitor(208) when the output data signal is the logic 0. An inverter(210) is used for inverting the logic value according to a voltage of the capacitor(208) and the inverted value to a reset terminal of the D-flipflop(202).
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