METHOD FOR FORMING SEMICONDUCTOR DEVICE

摘要

PURPOSE: A method for forming a semiconductor device is provided to prevent a short circuit between a local interconnection(LI) layer and a nested contact(NC) layer, by making a pair of the first and second NC's shifted to one direction by a misalign error. CONSTITUTION: A gate electrode(106) is formed in a metal-oxide-semiconductor(MOS) transistor formation part(A) on a semiconductor substrate(100) having an active region(102) by interposing a gate insulation layer(104). The first interlayer dielectric(110) is formed on the resultant structure. A predetermined thickness of the first interlayer dielectric is selectively etched to form the first concave part(s1) in a side of the upper edge of the gate electrode. The first interlayer dielectric is selectively etched to expose a part of the upper surface of the gate electrode and the surface of the upper surface. Simultaneously, the second NC(h2) connected to the first NC(h1) and the active region connected to the first concave part and the gate electrode is formed. The LI layer, the first NC plug(112b) and the second NC plug(112c) are respectively formed in the first concave part, the first NC and the second NC by a metal layer deposition process and a planarization process for the metal layer. An etch stopper layer is formed and selectively etched to expose the second NC plug. The second interlayer dielectric is formed, and is etched to expose the etch stopper layer so that the second concave part is formed. A molybdenum metal layer is formed in the second concave part.