发明名称 CIRCUIT SUITABLE FOR VERTICAL INTEGRATION AND METHOD OF PRODUCING SAME
摘要 This invention relates to a vertically integratable circuit and a method for producing same. Unlike known methods for producing vertical electric connections, the present method uses process steps in the production of the vertically integratable circuit itself to permit vertical integration. This simplifies the sequence of production for vertically integratable circuits and thus the three-dimensional integrated circuit as a whole, thereby optimizing plant running times since process steps are saved. Because finished substrates are no longer the starting point for producing the vertical electric connections, an improved yield is moreover obtained since no process steps which could in particular change the already produced active circuit elements, such as steps with high process temperatures, are necessary any longer after production of the circuit elements.
申请公布号 EP1183723(A1) 申请公布日期 2002.03.06
申请号 EP20000925226 申请日期 2000.04.19
申请人 GIESECKE & DEVRIENT GMBH 发明人 GRASSL, THOMAS
分类号 H01L23/52;H01L21/3205;H01L21/60;H01L21/768;H01L21/98;H01L25/065;H01L25/07;H01L25/18;H01L27/00;(IPC1-7):H01L21/768;H01L23/48 主分类号 H01L23/52
代理机构 代理人
主权项
地址
您可能感兴趣的专利