发明名称 |
PHASE-LOCKED LOOP |
摘要 |
<p>A phase lock circuit has a signal path to which a phase comparator, a loop filter and a voltage control oscillator are connected in series, the phase comparator being adapted to compare the phase of an input signal VIN with the phase in the output signal of the voltage control oscillator and to output its result of comparison, the loop filter being adapted to receive the output signal of the phase comparator and to output a DC voltage; the voltage control oscillator being adapted to control the output oscillation frequency depending on the DC output voltage of the loop filter, the phase lock circuit further comprising voltage tracking means for adding, to the voltage of the signal path, a signal causing the average voltage in the output voltage of the phase comparator to coincide with a predetermined reference voltage, whereby the voltage tracking means can enlarge the lock range in the phase lock circuit. <IMAGE></p> |
申请公布号 |
EP1184987(A1) |
申请公布日期 |
2002.03.06 |
申请号 |
EP20010915659 |
申请日期 |
2001.03.21 |
申请人 |
NTT ELECTRONICS CORPORATION;NIPPON TELEGRAPH AND TELEPHONE CORPORATION |
发明人 |
NOSAKA, HIDEYUKI;FUKUYAMA, HIROYUKI;KAMITSUNA, HIDEKI;MURAGUCHI, MASAHIRO;YONEYAMA, MIKIO;SASAKI, HIROAKI |
分类号 |
H03L7/087;H03L7/10;(IPC1-7):H03L7/10 |
主分类号 |
H03L7/087 |
代理机构 |
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代理人 |
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主权项 |
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地址 |
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