发明名称
摘要 LOCOS layers for defining NMOSFET and PMOSFET forming regions Rn and Rp are formed, and then a protective oxide layer is formed. A first resist layer, opened above the region Rn, is then formed on the protective oxide layer. By using the first resist layer as a mask, ion implantation is performed twice to form a threshold control layer and a P- layer functioning as a punch-through stopper or the like. By using the first resist layer as a mask, the substrate is etched to remove a portion of the protective oxide layer. Then, the first resist layer is removed. These processes are also performed on the region Rp. Then, a gate oxide layer is formed. Thus, it is possible to prevent a foreign impurity, introduced during the ion implantation, from diffusing the surrounding regions when the resist layers are removed. As a result, the properties of the gate oxide layer can be improved.
申请公布号 JP3262752(B2) 申请公布日期 2002.03.04
申请号 JP19980066615 申请日期 1998.03.17
申请人 发明人
分类号 H01L29/78;H01L21/762;H01L21/8238;H01L27/08;H01L27/092;(IPC1-7):H01L21/823 主分类号 H01L29/78
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