Semiconductor device incorporating clock generating circuit

摘要

A semiconductor device according to the present invention operates in response to a control clock generated by a control clock generating circuit. The control clock generating circuit includes a DLL circuit detecting an external clock period by a synchronous operation, a reference clock pulse generating circuit activated in synchronization with an external clock to generate a reference clock pulse having a pulse width in accordance with the external clock period, a delay circuit delaying stepwise the reference clock pulse per unit delay time in accordance with the external clock period, and an internal control clock generating circuit setting activation and inactivation timing of the control clock based on the delayed clock pulse.