| 摘要 |
A method and circuit are provided that can compensate for the various types of fatigue and degradation, including an imprint phenomenon, even under a variety of working conditions after a ferroelectric memory actually has been shipped as a product. The circuit includes a plurality of memory cell degradation detectors, a comparator, and a power supply circuit. Each of the memory cell degradation detectors has a plurality of data holding circuits that differ in capacitance ratio of a dummy bit line (Cb) to a dummy memory cell (Cs). The comparator compares signals from the memory cell degradation detectors to expected values. The power supply circuit changes a value of the voltage applied to the memory cell based on the signal from the comparator, provided as the result of comparison showing that the signals do not agree with the expected values. Thus, the fatigue and degradation of the ferroelectric memory cell can be detected so as to adjust the voltage to be applied to the memory cell during reading/writing.
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