发明名称 |
RECONFIGURABLE LOGIC FOR A COMPUTER |
摘要 |
A system (20) is disclosed including reconfigurable logic circuit (40) having programmable logic (50), interface memory (60), and logic design memory (80). Memory (80) stores a number of logic designs each operable to configure programmable logic (50). Also included is computer (22) coupled to reconfigurable logic circuit (40) that concurrently executes one or more application programs and an interface program. The application programs generate a number of requests to utilize reconfigurable logic circuit (40) and the interface program responds to the requests by opening a number of coexisting program interfaces. Reconfigurable logic circuit (40) is responsive to the interface program to provide a number of interface buffers in memory (60) that each belong to a corresponding one of the interfaces and are each operable to store data passing between computer (22) and reconfigurable logic circuit (40).
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申请公布号 |
WO0161525(A3) |
申请公布日期 |
2002.02.28 |
申请号 |
WO2001US04733 |
申请日期 |
2001.02.14 |
申请人 |
INTEL CORPORATION;MORELLI, JOHN;KENDALL, H., RICHARD |
发明人 |
MORELLI, JOHN;KENDALL, H., RICHARD |
分类号 |
H03K19/173;G06F15/78;(IPC1-7):G06F15/78 |
主分类号 |
H03K19/173 |
代理机构 |
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代理人 |
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主权项 |
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地址 |
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