发明名称 METHOD OF MANUFACTURING SEMICONDUCTOR MODULE
摘要 PROBLEM TO BE SOLVED: To provide a method of manufacturing a multilayer semiconductor module whereby the connection reliability can be improved. SOLUTION: An interlayer member 20 has through-holes 23, each having a downside opening 23B diameter larger than an upside opening 23A diameter as a tapered inner wall. As the result, a second conductive bump 25B formed on the lowerside has a larger diameter than that of a first conductive bump 25A formed on the upperside and is connected to a connecting bump 13 on a printed board 2. If a displacement occurs due to pressing during laminating, the displacement error can be absorbed to ensure a good connection between both bumps 13, 25B.
申请公布号 JP2002064178(A) 申请公布日期 2002.02.28
申请号 JP20000248592 申请日期 2000.08.18
申请人 IBIDEN CO LTD 发明人 KARIYA TAKASHI
分类号 H01L25/18;H01L25/065;H01L25/07;H01L25/10;H01L25/11;(IPC1-7):H01L25/065 主分类号 H01L25/18
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