发明名称 DECODER AND METHOD FOR DECODING
摘要 PROBLEM TO BE SOLVED: To set an optimal dynamic range and quantization indent width and a quantization indent width required for internal arithmetic operation even when the input of fixed bits is required. SOLUTION: Probability information AMP/CR×yt obtained by dividing a communication path, which is obtained by multiplying a received value yt by a prescribed coefficient AMP, by a first additional coefficient CR for controlling the amplitude of the received value yt and probability information 1/CA×APPt obtained by multiplying 1/CA, which is the inverse of a second additional coefficient CA for controlling the amplitude of previous probability information APPt, by the prior probability information APPt are inputted by a decoder 3' to a soft output decoding circuit 23 configured by being integrated on a single wafer as a large scale integrated circuit. By using the first additional coefficient CR, the second additional coefficient CA and a third additional coefficient CI for controlling the amplitude in arithmetic operation inside the relevant soft output decoding circuit 23, the soft output decoding circuit 23 generates a logarithmic soft output CI×Iλt and/or external information 1/CA×EXt.
申请公布号 JP2002064385(A) 申请公布日期 2002.02.28
申请号 JP20000248673 申请日期 2000.08.18
申请人 SONY CORP 发明人 MIYAUCHI TOSHIYUKI;HATTORI MASAYUKI;YAMAMOTO KOHEI;YOKOGAWA MINESHI
分类号 G06F11/10;H03M13/03;H03M13/23;H03M13/27;H03M13/29;H03M13/41;H03M13/45;(IPC1-7):H03M13/45 主分类号 G06F11/10
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