发明名称 TIME TO DIGITAL CONVERTER FOR ELECTRONIC CIRCUITS, USES COMBINATION OF APPROXIMATE AND PRECISE DELAY STAGES TO PROVIDE ACCURATE MEASUREMENT OF DELAY
摘要 PURPOSE: A time-to-digital converter for electronic circuits and a method of the same are provided to measure an arriving time of a continuous signal having more accurate resolution power than a period of a reference clock. CONSTITUTION: A time-to-digital converter(TDC)(10) includes a phase detector(14), a delay encoder(22) and an AND gate(23). The TDC(10) measures the arrival of a signal(EDGE) in a cycle of a clock signal(CLK) by using an approximate delay path with N series stages. N precise delay stages are coupled to the approximate delay stages, each having (M-1) precise delay stages and M signal propagation nodes. The TDC(10) keeps the clock signal(CLK) to be same in phase with respect to the delayed replica by controlling the delays through the second coarse delay path of the coarse delay stages. The time of arrival of the signal is the number of nodes in the N precise delay paths through which the signal passes. The plurality of registers store the voltages of the nodes in each fine delay path. The TDC(10) supplies the stored results to a plurality of priority encoders to encode time priority for arriving the signals at the nodes. The delay encoder(22) determines a propagation range of the continuous signal through the nodes, and thus generates a time-stamp representing the arriving time of the continuous signal.
申请公布号 KR20020015671(A) 申请公布日期 2002.02.28
申请号 KR20010050697 申请日期 2001.08.22
申请人 SCHLUMBERGER TECHNOLOGIES, INC. 发明人 WEST BURNELL G.
分类号 G04F10/04;G04F10/00;G04F10/06;H03K5/13;H03K5/135;(IPC1-7):G04F10/00 主分类号 G04F10/04
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